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The Field Collapse Pulse (FCP) is an Electrostatic Discharge analysis method which creates a repeatable pulse similar to a Charged Board Event. The concept was demonstrated by Pasi Tamminen at the ESDA Systems Level Working Group 14 meeting in 2014, and a paper was published on the topic in September of that year.[1]
The FCP test method for systems and PCBAs is similar in setup and utility to the Charged Device Model (CDM) method for integrated circuits and MCMs.
For investigation of ESD and electrical-overstress (EOS) effects the technique provides a repeatable characterization tool for transient entry- and exit-vectors for system-level ESD protection development.
History
The first system-level experiments for consumer electronics were conducted on a customer's system by Toni Viheriäkoski in May of 2013 at the laboratory of Cascade Metrology Oy in Lohja, Finland. The customer, an electronics manufacturer could not reproduce the field failures of their product with an IEC61000-4-2 test gun when stressed up to 8kV. However, with the field collapse the immediate damage occurred at 2kV.
As a derivative configuration of charged board event (CBE) testing, FCP allowed the System Under Test to be powered or unpowered, whereas with other characterization methods such as Transmission Line Pulse (TLP), pulsing into a powered system can damage the pulser.
Test Configuration
The FCP technique is based on essentially three plates comprising two plate capacitors in series, with one of these plates (on top) being the System Under Test. By charging the second plate in the stack and then discharging it to the third or bottom plate, a current flows through these two effective capacitors in a damped sinusoid. This current pulse, like CDM, is dependent on the contact point to the System Under Test and the effective capacitance formed by the size and proximity of the circuit nodes and planes in the System Under Test.
This scaling with system size is an important effect to consider in real-world testing since the effective peak discharge currents for equal charging voltages will be larger for the larger effective capacitance of, for example, a laptop versus a small cell phone.
Safety Advantages
The Field Collapse method keeps the System/Device Under Test (SUT/DUT) at ground potential, and the high-voltage is galvanically isolated from the system.
Only during the pulse discharge is there any current and possible di/dt voltage transient, as contrasted with IEC61000-4-2 Air Discharge testing, for example, where the tip exposes up to 30kV to inadvertent human contact, and can charge an ungrounded device to the charge level on successive zaps.
References
- ^ Tamminen, Pasi (7–12 September 2014). "Field Collapse Event ESD Test Method". Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2014: 1–6. Retrieved 18 July 2023.